Fabrication Schedule

Fabrication Schedule - Switch to Table View

Access to Fabrications Runs is available through:
• Shared Runs (“S”) – these are CMC targeted MPW runs
• On Demand Runs (“O”) – available from brokers which CMC can book if requested, however higher minimum areas/pricing may apply.

How to access?
• Academic research in Canada: Apply directly from the FAB Schedule.
• Industrial R&D or academic research outside Canada: Contact fab@cmc.ca for price options.
• For more information, including Canadian academic pricing, see FAB services for making working prototypes.

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Technology

Product	Jan	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
CMOS 45nm FDSOI (GF)									7		6
CMOS 22nm FDX (GF)									10		6
CMOS 28nm (TSMC)										11
CMOS-Photonics 90nm 9WG (GF)
BiCMOS 90nm SiGe (GF)
28 nm CMOS FDSOI (ST)					10						6
65 nm CMOS GP (TSMC)		27		10	28	23	12	10	,10 15		4
65 nm CMOS LP (TSMC)						10	12			11
0.13 µm CMOS (TSMC)				10	10	5	12	,10 20			6
0.18 µm CMOS (TSMC)			10	10	10	10		17	10
CMOSP18/BCD (TSMC)				1			12
CMOSP35/ (TSMC)		8		10			13			11	6
0.35 µm CMOS – Basic / Opto (AMS)	30	27		10				11			6
0.35 µm CMOS – High Voltage (AMS)							12
PiezoMUMPs (MEMSCAP)			10			10				13
PolyMUMPs (MEMSCAP)						22		27		12
MIDIS/(Teledyne/DALSA)	22										6
MicraGEM-Si (Micralyne)
AMF Si Photonics			11					27			6
III-V Epitaxy on GaAs Substrates			15	10	10	10	12	10	10	11	3

The above shows CMC targeted MPW runs/technologies available through our brokers, however it is not a complete list. If you are interested in a run or technology listed in a schedule linked below, please contact us at fab@cmc.ca to discuss access:

http://www.europractice-ic.com/docs/181115_MPW2019-miniasic-v2.0.pdf
https://www.globalfoundries.com/design-services/multi-project-wafer-program
https://www.musesemi.com/